The ongoing trend in technology means that increasingly complex systems made up of numerous different functional blocks can be integrated. These functional blocks are developed by different teams using different methods and communication protocols, these functional blocks being called intellectual properties.
It is therefore essential for these functional blocks to be able to intercommunicate, despite their different operating characteristics, such as the size of the data used and the frequencies used.
Furthermore, since the communicating elements are becoming more and more numerous, the systems need to be flexible or adaptable enough to support this trend.
Moreover, the cost of the wires in a system of interconnections has become dominant over the cost of the logic gates. Also, assessing an interconnection network architecture on silicon takes into account the conditions of use of the wires and their cost effectiveness (quantity of information transported in relation to the cost). Furthermore, since the time to market for new products is tending to shorten, the integration of the functional blocks needs to be more and more rapid. Also, the system or network of interconnections must be easy to implement.
Solutions exist for interconnecting IP functional blocks in a system of interconnections on a semiconductor chip, and are mostly based on data buses. These networks lack the necessary flexibility for rapid adaptation to technological changes and for increasing the number of communicating elements.
Such network architectures do not easily allow adaptation to the changing application-oriented requirements.